This new release adds major improvements, that I describe in this article. Turbo mode zeST now has a turbo mode, allowing the 68000 CPU to run at 50 MHz, instead of the original 8 MHz. Of course the goal of turbo mode is no longer cycle exactness, but rather achieve the maximum possible available performance allowed by your FPGA hardware. Switch turbo mode off, and you’re back to cycle exact 8 MHz again.

Here is the new release of zeST, mostly with fixes to make life better. Scan doubler rework The scan doubler has received particular attention for this new release. Indeed, a large part of its logic has been rewritten. This module is one of the first implemented in zeST, even before I got the TOS system to boot. It was already there when I displayed my first image out of the Atari ST logic on a HDMI screen.

This latest release fixes an important bug that made the system hang in specific memory access conditions. Specifically, on the Z7-Lite board, just changing the floppy disk image and then resetting the system triggered the bug. I didn’t see it because most of the development and debugging was done using my Z-Turn board. This bug was introduced in last September’s release, with the new memory interface that featured an internal cache.